The present invention generally relates to electrostatic discharge protection, and more specifically, to using vertical fin CMOS technology for electrostatic discharge protection.
Field effect transistors (FETs) have been known for a number of years and are now the transistor of choice for use in complex integrated digital circuits. In general, field effect transistors can be fabricated somewhat more simply and with larger process windows than bipolar transistors and, additionally, allow simplified circuit and device design. Constraints on transistor footprint size and current-carrying capacity are continually increasing to satisfy demands for higher digital switching performance, increased functionality and economy of manufacture.
In recent years, there has been significant research and development with regard to nonplanar transistor architectures. Some non-planar transistor architectures, such as VFETs, employ semiconductor fins and side-gates that can be contacted outside the active region, resulting in increased device density and some increased performance over lateral devices. In VFETs the source to drain current flows in a direction that is perpendicular to a major surface of the substrate. For example, in a known VFET configuration a major substrate surface is horizontal and a vertical fin or nanowire extends upward from the substrate surface. The fin or nanowire forms the channel region of the transistor. A source region and a drain region are situated in electrical contact with the top and bottom ends of the channel region, while the gate is disposed on one or more of the fin or nanowire sidewalls.
Electrostatic discharge devices and circuits are indispensable elements in integrated chip (IC) manufacturing. Electrostatic discharge is the sudden flow of electricity between electrically charged objects which can cause damage to the IC or other sensitive electronic devices when the current flow exceeds the allowable amount of electricity manageable by the device. If the electrostatic discharge device is not triggered at an acceptable range or if the electrostatic discharge is not sufficient enough to remove the discharged current further damage and failure to the electronic device can occur.